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Submit a ProposalVLSI for Artificial Intelligence and Machine Learning Applications
One Line Description
Unlock the next generation of AI chip design with this comprehensive guide to overcoming VLSI challenges, combining state-of-the-art nanomaterials, semiconductor modeling, and low-power circuit design into an essential roadmap for researchers and engineers.
Description
Very large-scale integration (VLSI) is the interdisciplinary science of utilizing advanced semiconductor technology to create various functions of a computer system. By combining VLSI technology, a very powerful computer architecture is possible to overcome the problems at different design stages. AI techniques such as knowledge-based and expert systems, at first try to define the problem and then choose the best solution from the domain of different possible solutions. This book comprehensively covers nanomaterials and semiconductor devices and modeling and simulations of their design parameters to meet the VLSI challenges for low-power chip design. Since process variability, device sizing, and power supply scaling are ongoing challenges in large VLSI circuit design, this book highlights the conventional and novel materials, devices and circuits, leakage mitigation techniques, and other important tradeoffs. This book provides the state-of-the-art research techniques available in the field of nanomaterials, as well as design considerations and techniques for VLSI circuit design for low power dissipation. This comprehensive guide is an essential resource for scientists, researchers, and postgraduate students interested in learning the latest emerging nanomaterials, semiconductor devices, modeling, and simulations for AI applications.
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Very large-scale integration (VLSI) is the interdisciplinary science of utilizing advanced semiconductor technology to create various functions of a computer system. By combining VLSI technology, a very powerful computer architecture is possible to overcome the problems at different design stages. AI techniques such as knowledge-based and expert systems, at first try to define the problem and then choose the best solution from the domain of different possible solutions. This book comprehensively covers nanomaterials and semiconductor devices and modeling and simulations of their design parameters to meet the VLSI challenges for low-power chip design. Since process variability, device sizing, and power supply scaling are ongoing challenges in large VLSI circuit design, this book highlights the conventional and novel materials, devices and circuits, leakage mitigation techniques, and other important tradeoffs. This book provides the state-of-the-art research techniques available in the field of nanomaterials, as well as design considerations and techniques for VLSI circuit design for low power dissipation. This comprehensive guide is an essential resource for scientists, researchers, and postgraduate students interested in learning the latest emerging nanomaterials, semiconductor devices, modeling, and simulations for AI applications.
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Author / Editor Details
Balwinder Raj, PhD is an Associate Professor at the National Institute of Technology Jalandhar, India with more than 15 years of teaching, research, and administrative experience. He has authored and co-authored eight books, 15 book chapters, and more than 150 research papers in peer-reviewed national and international journals and conferences. His areas of interest include classical and non-classical nanoscale semiconductor device modeling, nanoelectronics and their applications in hardware security, sensors and circuit design, and FinFET-based memory design.
Balwinder Raj, PhD is an Associate Professor at the National Institute of Technology Jalandhar, India with more than 15 years of teaching, research, and administrative experience. He has authored and co-authored eight books, 15 book chapters, and more than 150 research papers in peer-reviewed national and international journals and conferences. His areas of interest include classical and non-classical nanoscale semiconductor device modeling, nanoelectronics and their applications in hardware security, sensors and circuit design, and FinFET-based memory design.
Koushik Guha, PhD is an Associate Professor and Head of the Department of Electronics and Communication Engineering at the National Institute of Technology, Silchar, India. He has published more than 200 papers in journals and conferences of international repute and authored more than 35 book chapters and two books. His current research interests include mimicking human body functions using MEMS technology, RF MEMS, BIO-MEMS, design and development of smart sensors for IoT, and VLSI circuit design and optimization.
Shiromani Balmukund Rahi, PhD is an Assistant Professor in the School of Information and Communication Technology at Gautam Buddha University, Greater Noida, Uttar Pradesh, India He has successfully published 25 research articles, two conference proceedings, 25 book chapters, and seven books. His current research interests include low-power VLSI design, quantum dot cellularautomata, non-volatile memory devices, logic in memory computing, and neuromorphic computing.
Nehru Kandasamy, PhD is a Professor in the Department of Electronics and Communication Engineering at the Madanapalle Institute of Technology and Science, India. He has published several peer-reviewed articles and is a reviewer of more than 15 journals. His current research focuses on low-power VLSI design, quantum dot cellular automata, non-volatile memory devices, logic in memory computing, and neuromorphic computing.
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Table of Contents
Preface
1. 2D Nanomaterials for VLSI Devices
Sukanya Ghosh
1.1 Introduction
1.2 Recent Progress in 2D Nanomaterials
1.3 Optimizing FETs toward Theoretical Performance Limits
1.3.1 Implementing Innovative Contact Materials
1.3.2 Optimizing Interface Structures
1.3.3 Developing New Contact Processes
1.4 2D Materials in Heterogeneously Integrated VLSI Devices
1.5 2D Material Sensors
1.6 Conclusion and Future Scope
Bibliography
2. Nano-MOSFETs, Double-Gate MOSFET, FinFET, and TFET
R.G. Abaszade, A. Singh, S. Arya, G. Koushik, S.I. Yusifov and E.A. Khanmamadova
2.1 Introduction
2.2 The Possibilities of Using Nanomaterials in Nanoelements
2.3 Nano-MOSFETs
2.4 Double-Gate MOSFET
2.5 FinFET
2.6 TFET
2.7 Conclusion
References
3. Nanowire, Nanotube FET, and CNTFET
R.G. Abaszade, A. Singh, S. Arya, G. Koushik and E.A. Khanmamadova
3.1 Introduction
3.2 Nanostructured Materials
3.2.1 Zero-Dimensional Nanomaterials
3.2.2 One-Dimensional Materials
3.2.3 Two-Dimensional Materials
3.3 Nanowire Applications in Electronic Devices
3.4 Nanotube FETs and Applications
3.5 CNTFETs and Applications
3.6 Conclusion
References
4. Dielectric Modulated Extended Source DG-TFET–Based Label-Free Biosensor: Design and Analysis
Nidhish Tiwari, Bharat Choudhary and Rajesh Saha
4.1 Introduction
4.2 Review on FET as Biosensor Application
4.3 Device Architecture and Simulation Deck
4.4 Results and Discussion
4.4.1 Sensitivity Analysis for Neutral Biomolecules
4.4.2 Sensitivity Analysis for Charged Biomolecules Due to k Variation
4.4.3 Sensitivity Analysis Considering Steric Hindrance
4.4.4 Comparison of Sensitivity Among Proposed Biosensor and Biosensors in Literature
4.5 Conclusion
References
5. Gate-All-Around Transistors Transforming Future-Generation VLSI Scaling
P. Vimala, A. Sharon Geege, T.S. Arun Samuel and N. Mohan Kumar
5.1 Introduction
5.2 Industry Roadmap on GAA FETs
5.3 Comparison of GAA FETs Over MOSFET
5.4 Gate-All-Around Devices: Design Architecture
5.5 Horizontal Gate-All-Around Field-Effect Transistors
5.5.1 Device Architecture
5.5.2 Working Mechanism Gate-All-Around FET
5.6 Vertical Gate-All-Around Field-Effect Transistors
5.6.1 Notable Merits of Vertical GAA FETs
5.6.2 Structure and Working of Vertical GAAFETs
5.7 Comparison of Lateral and Vertical GAA-FETs
5.7.1 Fabrication Process of Horizontal and Vertical GAAFETs
5.7.1.1 SOI Wafer Preparation
5.7.1.2 Silicon Nanowire Formation
5.7.1.3 Gate Oxide Layer Formation
5.7.1.4 Gate Electrode Formation
5.7.1.5 Lightly Doped Outflow (LDD) Implantation and Spacer Formation
5.7.1.6 Deep Source/Drain Implantation
5.7.1.7 Contact Formation
5.7.1.8 Substrate Preparation
5.7.1.9 Creation of Vertical Nanowires or Nanosheets
5.7.1.10 Gate-All-Around Structure Formation
5.7.1.11 Source and Drain Formation
5.7.1.12 Contact Formation and Metallization
5.7.1.13 Backend Processes and Packaging
5.8 Challenges and Opportunities of GAA FETs in VLSI
5.9 Applications
5.10 Conclusion and Research Scopes
References
6. Optimization of Gate-All-Around Field-Effect Transistors
Design Using Genetic Algorithm
Chinmayee Dutta, Ananya Dastidar, Kanhu Charan Bhuyan and Dillip Kumar Sahoo
6.1 Introduction
6.2 Structural Description of Gate-All-Around Field-Effect Transistor
6.3 Fabrication Description of GAAFET
6.4 Operational Principle of GAAFET
6.4.1 Drain Current (I)DS in Gate-All-Around FET
6.4.2 Short-Channel Effects (SCEs) of Gate-All-Around FET
6.4.3 Subthreshold Swing (SS) of Gate-All-Around FET
6.4.4 Analog/RF Characteristics of Gate-All-Around FET
6.5 Genetic Algorithm-Based Optimization of GAAFET Parameters
6.5.1 Gate-All-Around FET Parameter Optimization
6.5.2 Genetic Algorithm Implementation
6.5.3 Optimization Results and Analysis
6.6 Application of Gate-All-Around (GAA) FET and Its Comparison to Other Devices
6.6.1 Biomedical Application
6.6.2 NRF and Analog Application
6.6.3 AI Technology
6.7 Summary
References
7. Bandgap Reference Circuits for AI Hardware: Challenges,
Design Trade-Offs, and Optimization Strategies
Mayank Kumar Singh, Rajasekhar Nagulapalli, Devarshi Mrinal Das and Mahendra Sakare
7.1 Introduction
7.1.1 Role of Bandgap References in Artificial Intellegence (AI) Hardware
7.1.2 AI Accelerators and Deep Learning Processors
7.1.3 Neuromorphic and Brain-Inspired Computing
7.2 Fundamentals of Bandgap Reference Circuits
7.2.1 Basic Working Principle Bandgap Reference Circuit
7.2.2 Positive Temperature Coefficient
7.2.3 Negative Temperature Coefficient
7.2.4 Compensating the Two Effects to Achieve a Stable Voltage
7.2.5 CMOS-Emulated Bipolar Devices
7.2.6 Dynamic and Digital Bandgap References
7.3 Evolution and Technological Advancements
7.4 Design Procedure of BGR Circuits
7.5 Challenges and Open Issues
7.6 Future Research Directions
7.6.1 Machine Learning Assisted Circuit Optimization for Bandgap Reference Circuits
7.6.2 Ultra-Low-Power Bandgap Reference circuits for AI-Powered Wearable’s and Biomedical Devices
7.7 Conclusion
References
8. High-Speed Continuous-Time Linear Equalizers for AI and Machine Learning Hardware: Design, Optimization, and Linearity Enhancement
Puneet Singh, Rahul Walia, Rajasekhar Nagulapalli and Mahendra Sakare
8.1 Introduction
8.2 Channel Impairments and Consideration
8.2.1 Line Loss
8.2.2 Channel Consideration
8.3 Continuous-Time Linear Equalizers
8.3.1 Boosting Filters
8.3.2 Traditional CTLE
8.4 Linearity-Improved CTLE Architecture and Circuit Design
8.5 Simulation Results and Discussion
8.6 Conclusion
Acknowledgement
References
9. Negative-Capacitance FET
Katuri Yeshwanth, Sanket Saxena, Suman Lata Tripathi and Balwinder Raj
9.1 Introduction
9.2 Simulated Device Architecture
9.3 Simulated Device Architecture
9.4 Simulation Result
9.5 Electrostatic Behavior in NC-FETs
9.5.1 Electrostatic Potential of NC-FET
9.5.2 Energy Band of NC-FET
9.5.3 Drain Induced Barrier Lowering (DIBL)
9.5.4 Subthreshold Slope
9.6 Comparison of NMOS and NC-FET
9.7 Conclusion
Acknowledgment
References
10. Adoption of Artificial Intelligence and Machine Learning Technique for Advanced Systems Design
Vidhya S. G., Afsha Firdose, Siddartha B. K., Manu Y. M., Dhruva M. S. and Nishchitha T. S.
10.1 Introduction
10.1.1 Overview
10.1.2 History and Evolution of Artificial Intelligence (AI)
10.2 The Impact of Artificial Intelligence (AI) and Machine Learning (ML) on System Design
10.2.1 Traditional System Design versus Artificial Intelligence (AI)-Powered Systems
10.3 Basic Concepts in Artificial Intelligence (AI) and System Design
10.3.1 Decision-Making Models
10.3.2 Probabilistic and Stochastic Decision-Making Models
10.3.3 Reinforcement Learning
10.3.4 Planning and Optimization-Based Decision-Asking
10.3.5 Decision Logic
10.3.6 Real-World Decision-Making Challenges
10.3.7 Safety and Risk Management
10.3.8 Real-Time Performance
10.3.9 Ethical and Social Implications
10.3.10 Healthcare Robotic
10.4 Selected Popular Applications of Artificial Intelligence
(AI) Based-Driven System
10.4.1 Application IoT in Smart Cities
10.4.2 Smart Traffic and Transportation Systems
10.4.3 Smart Energy Management
10.4.4 Energy Consumption Optimization
10.4.5 Smart Waste Management
10.4.6 Public Safety and Security
10.4.7 Emergency Response Systems
10.4.8 Disaster Management
10.4.9 Environmental Monitoring and Sustainability
Summary
Bibliography
11. A Comparative Study on Credit Card Fraud Ensnaring through Machine Learning
Sangram Panigrahi, Sushree Bibhuprada B. Priyadarshini, Pritam Pradhan, Adyasha Upasana, Jyoti Ranjan Sahoo, B. S. Byomkesh and Sanjoy Mondal
11.1 Introduction
11.1.1 Financial Fraud
11.1.2 Credit-Card Fraud
11.1.3 Protection Mechanisms against Fraud
11.1.4 Various Ultimatums in Fraud Detection
11.2 Literature Review
11.3 Machine Learning Classifiers
11.3.1 Unsupervised Classifiers
11.3.2 Semi Supervised Classifiers
11.3.3 Supervised Classifiers
11.3.3.1 Neural Network
11.3.3.2 K-Nearest Neighbor (KNN)
11.3.3.3 Support Vector Machine (SVM)
11.3.3.4 Decision Tree
11.3.3.5 Artificial Immune System (AIS)
11.4 Credit-Card Fraud Detection System (CFDS)
11.4.1 Logistic Regression
11.4.2 Random Forest
11.4.3 Neural Network (NN)
11.4.4 Convolutional Neural Network (CNN)
11.5 Performance Evaluation
11.5.1 Performance Metrics
11.5.2 Result Analysis
11.6 Summary
References
12. AI-Driven VLSI: Revolutionizing Semiconductor Design and Optimization
M. Bharathi, G. Sandhyakumari, N. Ashok Kumar, N. Padmaja, Krithikaa Mohanarangam, V. Jalaja and Yasha Jyothi M. Shirur
12.1 Introduction
12.1.1 The Rise of Artificial Intelligence (AI) in Semiconductor Design
12.1.2 The Need for AI-Driven Automation in VLSI
12.2 Role of AI in VLSI Design and Optimization
12.3 Artificial Intelligence (AI) Applications in Electronic
Design Automation (EDA) with Case Study
12.3.1 Artificial Intelligence (AI) in Design Space Exploration
12.3.2 Artificial Intelligence (AI) in Logic Synthesis and Optimization
12.3.3 Artificial Intelligence (AI) in Physical Design and Placement and Routing
12.3.4 Artificial Intelligence (AI) in Verification and Testing
12.3.5 Artificial Intelligence (AI) in Semiconductor Manufacturing and Yield Optimization
12.3.6 Artificial Intelligence (AI) in FPGA and ASIC Design
12.3.7 Machine Learning (ML) and Deep Learning (DL) in VLSI
12.4 Enhancing Power, Performance, and Area (PPA) Using AI
12.5 AI in FPGA and ASIC Design
12.6 Artificial Intelligence (AI) Driven Automation in VLSI Physical Design
12.6.1 Floor Planning and Placement Optimization
12.6.2 Artificial Intelligence (AI) Assisted Routing and Layout Generation
12.6.3 Standard Cell Design and Power Grid Optimization
12.7 Artificial Intelligence (AI) for Testing and Verification
in VLSI
12.7.1 Artificial Intelligence (AI) Based Fault Detection and Prediction
12.7.2 Automated Test Pattern Generation
12.7.3 Improving Yield and Reducing Defect Rates Using Artificial Intelligence (AI)
12.8 Challenges in AI-Driven VLSI Design
12.9 Future Directions
12.10 Conclusion
References
13. Performance Assessment of On-Chip Interconnects Using
Neural Network Techniques
N. Ashok Kumar, M. Bharathi, P. Nagarajan, Shaik Javid Basha, N. Geetha Rani and N. Praveen Kumar
13.1 Introduction
13.2 Network-on-Chip Architecture
13.2.1 Router Microarchitecture
13.2.2 Data Packet Structure and Control Flow
13.2.3 Ring Switch Microarchitecture
13.2.4 Interconnects in Non-ASIC NN Accelerators ASIC
13.2.5 FPGA-Based NN Operation
13.3 NN Operations on GPU
13.3.1 NN Operations on Embedded Processors
13.3.2 Multi/Manycore NOC Design and Optimization Challenges
13.3.3 Computation Constraint
13.3.4 Communication Constraint
13.3.5 Chip-Level Power Budget Constraint
13.4 Tile-Level Thermal Budget Constraint
13.4.1 Chip Area Constraint
13.4.2 Quality of Service: Task Deadline Requirement
13.4.3 Distributed Resource Management
13.4.4 Task Migration
13.5 Heterogeneity of Applications and Tasks
13.5.1 Resource Heterogeneity
13.6 NoC Topology
13.6.1 Interconnection Type
13.6.2 Interdependency of Technologies
13.6.3 Dark Silicon
13.6.4 Reliability
13.6.5 Routing-Router Design and Routing Algorithm
13.7 Scalability
13.7.1 Approximate Communication
13.7.2 Memory Bandwidth and Memory Controller Placement
13.7.3 Restricted Coulomb Energy Neural Network
Conclusion
References
14. AI/ML-Based Approaches to VLSI Design Methodologies
Jami Venkata Suman, Kolluru Anuhya, Kalisetti Purushotham Prasad, A. Swetha Priya, Omprakash Gurrapu and G.T. Chandra Sekhar
14.1 Introduction
14.2 Research Method
14.3 Result and Discussion
14.3.1 AI/ML-Based Design Automation
14.3.2 Predictive Analysis and Modeling
14.3.3 Verification and Testing
14.3.4 Power Management and Energy Efficiency
14.3.5 Hardware Optimization and Acceleration
14.3.6 Future Directions and Emerging Trends
14.4 Conclusion
14.5 Future Scope
References
15. In-Memory Computing Using Memristors
G. H. V. S. M. Soma Sai, P. Ramakrishna, Kala S. and Nalesh S.
15.1 Introduction to Memristors
15.2 Emergence of Memristors
15.3 Memristor Device Physics and Fabrication
15.4 Key Developments and Applications
15.5 Existing Memristor Model
15.5.1 Linear Ion Drift Model
15.5.2 Threshold Adaptive Memristor (TEAM) Model
15.5.3 Non-Linear Ion Drift Model
15.5.4 Simmons Tunnel Barrier Model
15.6 Memristor-Based Logic Families
15.7 Memristor-Based Computing Architectures
15.8 IMPLY Logic
15.9 IMPLY-Based Circuits
15.9.1 NOT Gate
15.9.2 OR Gate
15.9.3 NOR Gate
15.9.4 AND Gate
15.9.5 NAND Gate
15.9.6 XOR Gate
15.9.7 XNOR Gate
15.9.8 Multiplexer
15.10 Adders
15.10.1 Half Adder
15.10.2 Full Adder
15.10.2.1 Exact Full Adder
15.10.2.2 Approximate Full Adder
15.11 Design of Logic Gates
15.11.1 NOT Gate
15.11.2 OR Gate
15.11.3 NAND Gate
15.11.4 XOR Gate
15.11.5 Full Adder
15.11.6 Multiplexer Gate
15.12 Multiplier
15.12.1 Two-Bit Multiplier
15.12.2 Four-Bit Multiplier
15.12.3 Eight-Bit Multiplier
15.13 Reliability Challenges in IMPLY-Based In-Memory Computing with Memristors
15.14 Challenges Hindering Memristor Commercialization
15.14.1 Complex Fabrication and Integration Barriers
15.14.2 High Production Costs and Economic Viability
15.14.3 Competitive Pressure from Alternative Technologies
15.15 Emerging Opportunities in Memristor Technology
15.15.1 Collaborations with Industry to Drive Innovation
15.15.2 Rapid Demand for AI and Machine Learning
15.15.3 Transforming Consumer Electronics
15.16 Summary
Bibliography
16. Design of Voice of Care Using Personalized Voice Technology for Emotional Support and Digital Well-Being
Selvakumar V. S., J. Saranya, Dinesh K. and Gayathri S. R.
16.1 Introduction
16.1.1 Background and Motivation
16.1.2 The Role of AI in Emotional Support Systems
16.1.3 Limitations of Existing Voice Assistants
16.1.4 Objectives of the Voice of Care (VoC) System
16.2 Literature Review
16.2.1 Review of Current AI-Driven Emotional Support Technologies
16.2.2 NLP and Machine Learning in Voice-Interactive Systems
16.2.3 Cloud vs. Edge-Based Voice Assistant Architectures
16.2.4 Technological Enablers for Embedded AI
16.3 System Architecture and Implementation
16.3.1 Overview of the VoC system
16.3.2 Raspberry Pi 5 and 3B+ Configuration
16.3.3 USB Mic and Speaker
16.3.4 Home Assistant OS and System Deployment
16.3.5 Whisper STT for Speech to Text
16.3.6 Llama for Contextual NLP Responses
16.3.7 Piper TTS for Personalized Voice Synthesis
16.3.8 Wyoming Satellite
16.3.9 Comparative Evaluation of Core Components
16.4 Methodology
16.4.1 Connection Details and System Integration
16.4.2 Personalized Voice Creation and Fine Tuning with Piper
16.4.3 Data Flow in the System
16.5 Results
16.6 Future Enhancements
16.7 Conclusion
References
17. Revolutionizing Agricultural Logistics Using Automated
Sorting System
Selvakumar V. S., Saranya J., Archana D. and Harini N.
17.1 Introduction
17.2 Literature Survey
17.3 Proposed Solution and System Overview
17.4 System Architecture
17.4.1 Hardware Setup
17.4.1.1 Motorized Conveyor Belt
17.4.1.2 Raspberry Pi 5 (4GB)
17.4.1.3 Webcam
17.4.1.4 Load Cell with HX711 ADC
17.4.1.5 Gas Sensor (MQ Series)
17.4.1.6 Relays and Servos
17.4.2 Software Pipeline
17.4.2.1 Image Classification
17.4.2.2 Weight Measurement
17.4.2.3 QR Code Generation
17.4.3 Machine Learning Model
17.4.4 Dataset Description
17.5 Methodology
17.5.1 Overall Workflow
17.5.2 Input Stage
17.5.3 Image Capture and Preprocessing
17.5.4 Machine Learning Analysis and Decision-Making
17.5.5 Sorting and Actuation
17.5.6 Traceability and QR Code Generation
17.5.7 System Calibration and Maintenance
17.5.8 Experimental Setup and Performance Evaluation
17.5.9 Conclusion of Methodology
17.6 Results and Discussion
17.7 Conclusion
17.7.1 Performance Metrics and Throughput Analysis
17.7.2 Accuracy of Classification and Sorting Efficiency
17.7.3 Comparative Analysis with Manual Sorting Methods
17.7.4 Limitations, Challenges, and Error Analysis
17.7.5 Implications for Industrial-Scale Applications
17.7.6 Overall Discussion and Future Prospects
17.8 Future Work
References
18. VLSI Circuits and Systems for Smart Agriculture: Innovations and Applications
M. Bharathi, Madhurima V., N. Ashok Kumar, Saleha Tabassum, G. Sandhyakumari, Yasha Jyothi M. Shirur and Krithikaa Mohanarangam
18.1 Introduction
18.1.1 Evolution of Smart Farming Technologies
18.1.1.1 Traditional Agriculture (Pre-20th Century to Early 1900s)
18.1.1.2 Mechanized Farming (Mid-20th Century to 1960s)
18.1.1.3 Digital and Automated Farming (1980s to 2000s)
18.1.1.4 Precision Agriculture and IoT (2010s to Present)
18.1.1.5 AI-Driven and Autonomous Farming (Future)
18.2 Low-Power VLSI Circuits for Smart Agriculture
18.3 Energy-Efficient Sensor Nodes
18.4 Low-Power Microcontrollers and Processors
18.5 Power Management Techniques for Remote Agriculture Applications
18.6 VLSI-Based Sensor Systems for Agriculture Applications
18.7 Wireless Communication and IoT Integration in Agriculture
18.8 VLSI Solutions Based on Cloud Computing and Edge Computing
18.8.1 Artificial Intelligence (AI) and Machine Learning (ML) in VLSI-Based Agricultural Systems
18.2.8 Crop Health Monitoring Powered by Artificial Intelligence (AI)
18.8.3 Designing an FPGA and ASIC for Real-Time Image Processing
18.8.4 Using VLSI Circuits for Accurate Agriculture
18.9 Precision Agriculture using VLSI Circuits
18.10 VLSI Circuits for Greenhouse and Controlled Environment Agriculture
18.10.1 Climate Control and Automation Circuits
18.10.2 Smart Lighting and Energy-Efficient Greenhouse Monitoring
18.10.3 VLSI-Based Hydroponics and Aeroponics Systems
18.11 Conclusion
References
19. Fundamentals of Memristors: Principles, Characteristics, and Emerging Applications
Rajib Sutradhar, Himangshu Jyoti Gogoi, Kuldeep Gogoi, Bijoy Barman, P. Puspa Devi and Dipjyoti Das
19.1 Introduction
19.2 Materials for Memristors
19.2.1 Electrode Materials
19.2.2 Resistive Switching Materials
19.2.2.1 Binary Oxides
19.2.2.2 Perovskites
19.2.2.3 Organic Materials
19.2.2.4 2D Materials
19.3 Memristor Characterization
19.3.1 Endurance
19.3.2 Retention
19.3.3 Switching Time and Energy Consumption
19.3.4 Cell to Cell and Cycle to Cycle Variability
19.3.5 Scalability
19.3.6 Switching Mechanism
19.4 Multiscale Simulation of Resistive Switching: Bridging Materials, Devices, and Systems
19.4.1 Microscopic Models
19.4.2 kMC/FEM Models
19.4.3 Semi-Empirical/Compact Models
19.5 Future Scope and Challenges
19.6 Conclusion
References
20. ZnO Nanotube–Based Biosensors for the Detection of DNA
Bases: A Comparative Study on Cytosine and Thymine Sensing
Indranil Maity and Siddhartha Bhattacharya
20.1 Introduction
20.2 Computational Methodology
20.3 Results and Discussion
20.3.1 Adsorption Energy Analysis
20.3.2 HOMO-LUMO Analysis
20.3.3 Density of States (DOS) Analysis
20.3.4 Projected Density of States (PDOS) Analysis
20.3.5 Molecular Electrostatic Potential (MEP) Mapping
20.3.6 Infrared (IR) Spectra Analysis
20.3.7 Electron Localization Function (ELF) Analysis
20.3.8 Mulliken Charge Analysis
20.3.9 Calculations of Global Parameters
20.3.9.1 Chemical Potential (μ)
20.3.9.2 Electronic Conductivity (σ)
20.3.9.3 Recovery Time (τ)
20.3.9.4 Sensitivity (S)
20.4 Comparative Analysis on Type-1 and Type-2 Systems
20.5 Application of Artificial Intelligence (AI) and Machine Learning (ML) in Bio-Sensors
20.6 Conclusion
Acknowledgment
References
21. Impact of Artificial Intelligence and Machine Learning
on the Design of Systems and the Future
Neha Tyagi
21.1 Introduction
21.2 Defining Applications of Artificial Intelligence and Machine Learning
21.3 The Necessity of Artificial Intelligence (AI) and Machine Learning (ML) in Modern System Design
21.4 Objectives
21.4.1 Understanding the Evolution of System Design with the Advent of Artificial Intelligence (AI) and Machine Learning (ML)
21.4.2 Analyzing Key Domains
21.4.3 Exploring Future Trends and Challenges, Including Ethical Considerations and Regulatory Concerns
21.4.4 Highlighting Real-World Applications and Case Studies to Showcase the Practical Benefits of AI-Driven System Design
21.5 Historical Context and Evolution
21.5.1 The Evolution of AI and ML in System Design
21.5.2 Early Rule-Based Expert Systems
21.5.3 The Rise of Machine Learning and Data-Driven Systems
21.5.4 The Deep Learning Revolution
21.5.5 Transition to Dynamic, Learning-Based Architectures
21.5.6 The Future of Artificial Intelligence (AI) and Machine Learning (ML) in System Design
21.6 Traditional System Design Approaches
21.6.1 Key Challenges of Traditional System Design
21.6.1.1 Scalability Issues
21.6.1.2 Limited Adaptability
21.6.1.3 High Maintenance Costs
21.6.2 Use Cases and Limitations
21.7 The Transformation Brought by Artificial Intelligence (AI) and Machine Learning (ML)
21.7.1 Automated Decision Making
21.7.2 Predictive Analytics
21.7.3 Adaptive Systems
21.7.4 Enhanced Scalability and Efficiency
21.8 Case Study for AI-Driven System Evolution in E-Commerce
21.8.1 Personalized Recommendations
21.8.2 Automated Customer Service
21.8.3 Fraud Detection and Security
21.9 The Role of Data in Artificial Intelligence (AI) Driven
System Design
21.9.1 Data Quality
21.9.2 Data Diversity
21.9.3 Real-Time Data Processing
21.10 Challenges in AI-Driven System Design
21.10.1 Data Privacy Concerns
21.10.2 Algorithm Bias
21.10.3 Computational Resource Demands and Energy Concerns
21.10.4 Additional Challenges Lack of Explain Ability and Transparency
21.11 Future Outlook
21.12 Conclusion
Bibliography
22. Non-Volatile Memory Devices for Neuromorphic Computing
Debasis Das
22.1 Introduction
22.2 Understanding the Neuro-Synaptic Behavior
22.2.1 Neuronal Dynamics
22.2.2 Synaptic Behavior
22.2.2.1 Supervised Learning
22.2.2.2 Unsupervised Learning
22.3 Implementing Neuromorphic Hardware Using eNVM Devices
22.3.1 Phase-Change Memory Devices
22.3.1.1 Device Physics
22.3.2 PCM As Spiking Neurons
22.3.3 PCM as Synapse
22.4 Resistive Memory Device
22.4.1 Device Physics
22.4.2 RRAM as Spiking Neurons
22.4.3 RRAM as Synapse
22.5 Spintronics Devices
22.5.1 Various Spintronic Devices and Its Operation
22.5.2 Spitronic Devices as Neuron
22.5.3 Spintronic Devices as Synapse
22.6 Conclusion
References
23. Cross-Voter Detection Using Zynq 7000 SoC Kit
Arun Kumar Manoharan, Nagarjuna Telagam, Nehru Kandasamy, Menakadevi Nanjundan and Balwinder Raj
23.1 Introduction
23.2 Cross-Voting Detection Algorithms
23.3 FPGA-Based Cross-Voting Detection
23.4 Zynq 7000 FPGA Applications
23.5 Edge Computing in Elections
23.6 System Model
23.7 Algorithm
23.8 Working Mechanism
23.9 Working on the Zynq Board
23.10 Results and Discussions
23.11 Conclusion
Bibliography
Index
Back to Top
Preface
1. 2D Nanomaterials for VLSI Devices
Sukanya Ghosh
1.1 Introduction
1.2 Recent Progress in 2D Nanomaterials
1.3 Optimizing FETs toward Theoretical Performance Limits
1.3.1 Implementing Innovative Contact Materials
1.3.2 Optimizing Interface Structures
1.3.3 Developing New Contact Processes
1.4 2D Materials in Heterogeneously Integrated VLSI Devices
1.5 2D Material Sensors
1.6 Conclusion and Future Scope
Bibliography
2. Nano-MOSFETs, Double-Gate MOSFET, FinFET, and TFET
R.G. Abaszade, A. Singh, S. Arya, G. Koushik, S.I. Yusifov and E.A. Khanmamadova
2.1 Introduction
2.2 The Possibilities of Using Nanomaterials in Nanoelements
2.3 Nano-MOSFETs
2.4 Double-Gate MOSFET
2.5 FinFET
2.6 TFET
2.7 Conclusion
References
3. Nanowire, Nanotube FET, and CNTFET
R.G. Abaszade, A. Singh, S. Arya, G. Koushik and E.A. Khanmamadova
3.1 Introduction
3.2 Nanostructured Materials
3.2.1 Zero-Dimensional Nanomaterials
3.2.2 One-Dimensional Materials
3.2.3 Two-Dimensional Materials
3.3 Nanowire Applications in Electronic Devices
3.4 Nanotube FETs and Applications
3.5 CNTFETs and Applications
3.6 Conclusion
References
4. Dielectric Modulated Extended Source DG-TFET–Based Label-Free Biosensor: Design and Analysis
Nidhish Tiwari, Bharat Choudhary and Rajesh Saha
4.1 Introduction
4.2 Review on FET as Biosensor Application
4.3 Device Architecture and Simulation Deck
4.4 Results and Discussion
4.4.1 Sensitivity Analysis for Neutral Biomolecules
4.4.2 Sensitivity Analysis for Charged Biomolecules Due to k Variation
4.4.3 Sensitivity Analysis Considering Steric Hindrance
4.4.4 Comparison of Sensitivity Among Proposed Biosensor and Biosensors in Literature
4.5 Conclusion
References
5. Gate-All-Around Transistors Transforming Future-Generation VLSI Scaling
P. Vimala, A. Sharon Geege, T.S. Arun Samuel and N. Mohan Kumar
5.1 Introduction
5.2 Industry Roadmap on GAA FETs
5.3 Comparison of GAA FETs Over MOSFET
5.4 Gate-All-Around Devices: Design Architecture
5.5 Horizontal Gate-All-Around Field-Effect Transistors
5.5.1 Device Architecture
5.5.2 Working Mechanism Gate-All-Around FET
5.6 Vertical Gate-All-Around Field-Effect Transistors
5.6.1 Notable Merits of Vertical GAA FETs
5.6.2 Structure and Working of Vertical GAAFETs
5.7 Comparison of Lateral and Vertical GAA-FETs
5.7.1 Fabrication Process of Horizontal and Vertical GAAFETs
5.7.1.1 SOI Wafer Preparation
5.7.1.2 Silicon Nanowire Formation
5.7.1.3 Gate Oxide Layer Formation
5.7.1.4 Gate Electrode Formation
5.7.1.5 Lightly Doped Outflow (LDD) Implantation and Spacer Formation
5.7.1.6 Deep Source/Drain Implantation
5.7.1.7 Contact Formation
5.7.1.8 Substrate Preparation
5.7.1.9 Creation of Vertical Nanowires or Nanosheets
5.7.1.10 Gate-All-Around Structure Formation
5.7.1.11 Source and Drain Formation
5.7.1.12 Contact Formation and Metallization
5.7.1.13 Backend Processes and Packaging
5.8 Challenges and Opportunities of GAA FETs in VLSI
5.9 Applications
5.10 Conclusion and Research Scopes
References
6. Optimization of Gate-All-Around Field-Effect Transistors
Design Using Genetic Algorithm
Chinmayee Dutta, Ananya Dastidar, Kanhu Charan Bhuyan and Dillip Kumar Sahoo
6.1 Introduction
6.2 Structural Description of Gate-All-Around Field-Effect Transistor
6.3 Fabrication Description of GAAFET
6.4 Operational Principle of GAAFET
6.4.1 Drain Current (I)DS in Gate-All-Around FET
6.4.2 Short-Channel Effects (SCEs) of Gate-All-Around FET
6.4.3 Subthreshold Swing (SS) of Gate-All-Around FET
6.4.4 Analog/RF Characteristics of Gate-All-Around FET
6.5 Genetic Algorithm-Based Optimization of GAAFET Parameters
6.5.1 Gate-All-Around FET Parameter Optimization
6.5.2 Genetic Algorithm Implementation
6.5.3 Optimization Results and Analysis
6.6 Application of Gate-All-Around (GAA) FET and Its Comparison to Other Devices
6.6.1 Biomedical Application
6.6.2 NRF and Analog Application
6.6.3 AI Technology
6.7 Summary
References
7. Bandgap Reference Circuits for AI Hardware: Challenges,
Design Trade-Offs, and Optimization Strategies
Mayank Kumar Singh, Rajasekhar Nagulapalli, Devarshi Mrinal Das and Mahendra Sakare
7.1 Introduction
7.1.1 Role of Bandgap References in Artificial Intellegence (AI) Hardware
7.1.2 AI Accelerators and Deep Learning Processors
7.1.3 Neuromorphic and Brain-Inspired Computing
7.2 Fundamentals of Bandgap Reference Circuits
7.2.1 Basic Working Principle Bandgap Reference Circuit
7.2.2 Positive Temperature Coefficient
7.2.3 Negative Temperature Coefficient
7.2.4 Compensating the Two Effects to Achieve a Stable Voltage
7.2.5 CMOS-Emulated Bipolar Devices
7.2.6 Dynamic and Digital Bandgap References
7.3 Evolution and Technological Advancements
7.4 Design Procedure of BGR Circuits
7.5 Challenges and Open Issues
7.6 Future Research Directions
7.6.1 Machine Learning Assisted Circuit Optimization for Bandgap Reference Circuits
7.6.2 Ultra-Low-Power Bandgap Reference circuits for AI-Powered Wearable’s and Biomedical Devices
7.7 Conclusion
References
8. High-Speed Continuous-Time Linear Equalizers for AI and Machine Learning Hardware: Design, Optimization, and Linearity Enhancement
Puneet Singh, Rahul Walia, Rajasekhar Nagulapalli and Mahendra Sakare
8.1 Introduction
8.2 Channel Impairments and Consideration
8.2.1 Line Loss
8.2.2 Channel Consideration
8.3 Continuous-Time Linear Equalizers
8.3.1 Boosting Filters
8.3.2 Traditional CTLE
8.4 Linearity-Improved CTLE Architecture and Circuit Design
8.5 Simulation Results and Discussion
8.6 Conclusion
Acknowledgement
References
9. Negative-Capacitance FET
Katuri Yeshwanth, Sanket Saxena, Suman Lata Tripathi and Balwinder Raj
9.1 Introduction
9.2 Simulated Device Architecture
9.3 Simulated Device Architecture
9.4 Simulation Result
9.5 Electrostatic Behavior in NC-FETs
9.5.1 Electrostatic Potential of NC-FET
9.5.2 Energy Band of NC-FET
9.5.3 Drain Induced Barrier Lowering (DIBL)
9.5.4 Subthreshold Slope
9.6 Comparison of NMOS and NC-FET
9.7 Conclusion
Acknowledgment
References
10. Adoption of Artificial Intelligence and Machine Learning Technique for Advanced Systems Design
Vidhya S. G., Afsha Firdose, Siddartha B. K., Manu Y. M., Dhruva M. S. and Nishchitha T. S.
10.1 Introduction
10.1.1 Overview
10.1.2 History and Evolution of Artificial Intelligence (AI)
10.2 The Impact of Artificial Intelligence (AI) and Machine Learning (ML) on System Design
10.2.1 Traditional System Design versus Artificial Intelligence (AI)-Powered Systems
10.3 Basic Concepts in Artificial Intelligence (AI) and System Design
10.3.1 Decision-Making Models
10.3.2 Probabilistic and Stochastic Decision-Making Models
10.3.3 Reinforcement Learning
10.3.4 Planning and Optimization-Based Decision-Asking
10.3.5 Decision Logic
10.3.6 Real-World Decision-Making Challenges
10.3.7 Safety and Risk Management
10.3.8 Real-Time Performance
10.3.9 Ethical and Social Implications
10.3.10 Healthcare Robotic
10.4 Selected Popular Applications of Artificial Intelligence
(AI) Based-Driven System
10.4.1 Application IoT in Smart Cities
10.4.2 Smart Traffic and Transportation Systems
10.4.3 Smart Energy Management
10.4.4 Energy Consumption Optimization
10.4.5 Smart Waste Management
10.4.6 Public Safety and Security
10.4.7 Emergency Response Systems
10.4.8 Disaster Management
10.4.9 Environmental Monitoring and Sustainability
Summary
Bibliography
11. A Comparative Study on Credit Card Fraud Ensnaring through Machine Learning
Sangram Panigrahi, Sushree Bibhuprada B. Priyadarshini, Pritam Pradhan, Adyasha Upasana, Jyoti Ranjan Sahoo, B. S. Byomkesh and Sanjoy Mondal
11.1 Introduction
11.1.1 Financial Fraud
11.1.2 Credit-Card Fraud
11.1.3 Protection Mechanisms against Fraud
11.1.4 Various Ultimatums in Fraud Detection
11.2 Literature Review
11.3 Machine Learning Classifiers
11.3.1 Unsupervised Classifiers
11.3.2 Semi Supervised Classifiers
11.3.3 Supervised Classifiers
11.3.3.1 Neural Network
11.3.3.2 K-Nearest Neighbor (KNN)
11.3.3.3 Support Vector Machine (SVM)
11.3.3.4 Decision Tree
11.3.3.5 Artificial Immune System (AIS)
11.4 Credit-Card Fraud Detection System (CFDS)
11.4.1 Logistic Regression
11.4.2 Random Forest
11.4.3 Neural Network (NN)
11.4.4 Convolutional Neural Network (CNN)
11.5 Performance Evaluation
11.5.1 Performance Metrics
11.5.2 Result Analysis
11.6 Summary
References
12. AI-Driven VLSI: Revolutionizing Semiconductor Design and Optimization
M. Bharathi, G. Sandhyakumari, N. Ashok Kumar, N. Padmaja, Krithikaa Mohanarangam, V. Jalaja and Yasha Jyothi M. Shirur
12.1 Introduction
12.1.1 The Rise of Artificial Intelligence (AI) in Semiconductor Design
12.1.2 The Need for AI-Driven Automation in VLSI
12.2 Role of AI in VLSI Design and Optimization
12.3 Artificial Intelligence (AI) Applications in Electronic
Design Automation (EDA) with Case Study
12.3.1 Artificial Intelligence (AI) in Design Space Exploration
12.3.2 Artificial Intelligence (AI) in Logic Synthesis and Optimization
12.3.3 Artificial Intelligence (AI) in Physical Design and Placement and Routing
12.3.4 Artificial Intelligence (AI) in Verification and Testing
12.3.5 Artificial Intelligence (AI) in Semiconductor Manufacturing and Yield Optimization
12.3.6 Artificial Intelligence (AI) in FPGA and ASIC Design
12.3.7 Machine Learning (ML) and Deep Learning (DL) in VLSI
12.4 Enhancing Power, Performance, and Area (PPA) Using AI
12.5 AI in FPGA and ASIC Design
12.6 Artificial Intelligence (AI) Driven Automation in VLSI Physical Design
12.6.1 Floor Planning and Placement Optimization
12.6.2 Artificial Intelligence (AI) Assisted Routing and Layout Generation
12.6.3 Standard Cell Design and Power Grid Optimization
12.7 Artificial Intelligence (AI) for Testing and Verification
in VLSI
12.7.1 Artificial Intelligence (AI) Based Fault Detection and Prediction
12.7.2 Automated Test Pattern Generation
12.7.3 Improving Yield and Reducing Defect Rates Using Artificial Intelligence (AI)
12.8 Challenges in AI-Driven VLSI Design
12.9 Future Directions
12.10 Conclusion
References
13. Performance Assessment of On-Chip Interconnects Using
Neural Network Techniques
N. Ashok Kumar, M. Bharathi, P. Nagarajan, Shaik Javid Basha, N. Geetha Rani and N. Praveen Kumar
13.1 Introduction
13.2 Network-on-Chip Architecture
13.2.1 Router Microarchitecture
13.2.2 Data Packet Structure and Control Flow
13.2.3 Ring Switch Microarchitecture
13.2.4 Interconnects in Non-ASIC NN Accelerators ASIC
13.2.5 FPGA-Based NN Operation
13.3 NN Operations on GPU
13.3.1 NN Operations on Embedded Processors
13.3.2 Multi/Manycore NOC Design and Optimization Challenges
13.3.3 Computation Constraint
13.3.4 Communication Constraint
13.3.5 Chip-Level Power Budget Constraint
13.4 Tile-Level Thermal Budget Constraint
13.4.1 Chip Area Constraint
13.4.2 Quality of Service: Task Deadline Requirement
13.4.3 Distributed Resource Management
13.4.4 Task Migration
13.5 Heterogeneity of Applications and Tasks
13.5.1 Resource Heterogeneity
13.6 NoC Topology
13.6.1 Interconnection Type
13.6.2 Interdependency of Technologies
13.6.3 Dark Silicon
13.6.4 Reliability
13.6.5 Routing-Router Design and Routing Algorithm
13.7 Scalability
13.7.1 Approximate Communication
13.7.2 Memory Bandwidth and Memory Controller Placement
13.7.3 Restricted Coulomb Energy Neural Network
Conclusion
References
14. AI/ML-Based Approaches to VLSI Design Methodologies
Jami Venkata Suman, Kolluru Anuhya, Kalisetti Purushotham Prasad, A. Swetha Priya, Omprakash Gurrapu and G.T. Chandra Sekhar
14.1 Introduction
14.2 Research Method
14.3 Result and Discussion
14.3.1 AI/ML-Based Design Automation
14.3.2 Predictive Analysis and Modeling
14.3.3 Verification and Testing
14.3.4 Power Management and Energy Efficiency
14.3.5 Hardware Optimization and Acceleration
14.3.6 Future Directions and Emerging Trends
14.4 Conclusion
14.5 Future Scope
References
15. In-Memory Computing Using Memristors
G. H. V. S. M. Soma Sai, P. Ramakrishna, Kala S. and Nalesh S.
15.1 Introduction to Memristors
15.2 Emergence of Memristors
15.3 Memristor Device Physics and Fabrication
15.4 Key Developments and Applications
15.5 Existing Memristor Model
15.5.1 Linear Ion Drift Model
15.5.2 Threshold Adaptive Memristor (TEAM) Model
15.5.3 Non-Linear Ion Drift Model
15.5.4 Simmons Tunnel Barrier Model
15.6 Memristor-Based Logic Families
15.7 Memristor-Based Computing Architectures
15.8 IMPLY Logic
15.9 IMPLY-Based Circuits
15.9.1 NOT Gate
15.9.2 OR Gate
15.9.3 NOR Gate
15.9.4 AND Gate
15.9.5 NAND Gate
15.9.6 XOR Gate
15.9.7 XNOR Gate
15.9.8 Multiplexer
15.10 Adders
15.10.1 Half Adder
15.10.2 Full Adder
15.10.2.1 Exact Full Adder
15.10.2.2 Approximate Full Adder
15.11 Design of Logic Gates
15.11.1 NOT Gate
15.11.2 OR Gate
15.11.3 NAND Gate
15.11.4 XOR Gate
15.11.5 Full Adder
15.11.6 Multiplexer Gate
15.12 Multiplier
15.12.1 Two-Bit Multiplier
15.12.2 Four-Bit Multiplier
15.12.3 Eight-Bit Multiplier
15.13 Reliability Challenges in IMPLY-Based In-Memory Computing with Memristors
15.14 Challenges Hindering Memristor Commercialization
15.14.1 Complex Fabrication and Integration Barriers
15.14.2 High Production Costs and Economic Viability
15.14.3 Competitive Pressure from Alternative Technologies
15.15 Emerging Opportunities in Memristor Technology
15.15.1 Collaborations with Industry to Drive Innovation
15.15.2 Rapid Demand for AI and Machine Learning
15.15.3 Transforming Consumer Electronics
15.16 Summary
Bibliography
16. Design of Voice of Care Using Personalized Voice Technology for Emotional Support and Digital Well-Being
Selvakumar V. S., J. Saranya, Dinesh K. and Gayathri S. R.
16.1 Introduction
16.1.1 Background and Motivation
16.1.2 The Role of AI in Emotional Support Systems
16.1.3 Limitations of Existing Voice Assistants
16.1.4 Objectives of the Voice of Care (VoC) System
16.2 Literature Review
16.2.1 Review of Current AI-Driven Emotional Support Technologies
16.2.2 NLP and Machine Learning in Voice-Interactive Systems
16.2.3 Cloud vs. Edge-Based Voice Assistant Architectures
16.2.4 Technological Enablers for Embedded AI
16.3 System Architecture and Implementation
16.3.1 Overview of the VoC system
16.3.2 Raspberry Pi 5 and 3B+ Configuration
16.3.3 USB Mic and Speaker
16.3.4 Home Assistant OS and System Deployment
16.3.5 Whisper STT for Speech to Text
16.3.6 Llama for Contextual NLP Responses
16.3.7 Piper TTS for Personalized Voice Synthesis
16.3.8 Wyoming Satellite
16.3.9 Comparative Evaluation of Core Components
16.4 Methodology
16.4.1 Connection Details and System Integration
16.4.2 Personalized Voice Creation and Fine Tuning with Piper
16.4.3 Data Flow in the System
16.5 Results
16.6 Future Enhancements
16.7 Conclusion
References
17. Revolutionizing Agricultural Logistics Using Automated
Sorting System
Selvakumar V. S., Saranya J., Archana D. and Harini N.
17.1 Introduction
17.2 Literature Survey
17.3 Proposed Solution and System Overview
17.4 System Architecture
17.4.1 Hardware Setup
17.4.1.1 Motorized Conveyor Belt
17.4.1.2 Raspberry Pi 5 (4GB)
17.4.1.3 Webcam
17.4.1.4 Load Cell with HX711 ADC
17.4.1.5 Gas Sensor (MQ Series)
17.4.1.6 Relays and Servos
17.4.2 Software Pipeline
17.4.2.1 Image Classification
17.4.2.2 Weight Measurement
17.4.2.3 QR Code Generation
17.4.3 Machine Learning Model
17.4.4 Dataset Description
17.5 Methodology
17.5.1 Overall Workflow
17.5.2 Input Stage
17.5.3 Image Capture and Preprocessing
17.5.4 Machine Learning Analysis and Decision-Making
17.5.5 Sorting and Actuation
17.5.6 Traceability and QR Code Generation
17.5.7 System Calibration and Maintenance
17.5.8 Experimental Setup and Performance Evaluation
17.5.9 Conclusion of Methodology
17.6 Results and Discussion
17.7 Conclusion
17.7.1 Performance Metrics and Throughput Analysis
17.7.2 Accuracy of Classification and Sorting Efficiency
17.7.3 Comparative Analysis with Manual Sorting Methods
17.7.4 Limitations, Challenges, and Error Analysis
17.7.5 Implications for Industrial-Scale Applications
17.7.6 Overall Discussion and Future Prospects
17.8 Future Work
References
18. VLSI Circuits and Systems for Smart Agriculture: Innovations and Applications
M. Bharathi, Madhurima V., N. Ashok Kumar, Saleha Tabassum, G. Sandhyakumari, Yasha Jyothi M. Shirur and Krithikaa Mohanarangam
18.1 Introduction
18.1.1 Evolution of Smart Farming Technologies
18.1.1.1 Traditional Agriculture (Pre-20th Century to Early 1900s)
18.1.1.2 Mechanized Farming (Mid-20th Century to 1960s)
18.1.1.3 Digital and Automated Farming (1980s to 2000s)
18.1.1.4 Precision Agriculture and IoT (2010s to Present)
18.1.1.5 AI-Driven and Autonomous Farming (Future)
18.2 Low-Power VLSI Circuits for Smart Agriculture
18.3 Energy-Efficient Sensor Nodes
18.4 Low-Power Microcontrollers and Processors
18.5 Power Management Techniques for Remote Agriculture Applications
18.6 VLSI-Based Sensor Systems for Agriculture Applications
18.7 Wireless Communication and IoT Integration in Agriculture
18.8 VLSI Solutions Based on Cloud Computing and Edge Computing
18.8.1 Artificial Intelligence (AI) and Machine Learning (ML) in VLSI-Based Agricultural Systems
18.2.8 Crop Health Monitoring Powered by Artificial Intelligence (AI)
18.8.3 Designing an FPGA and ASIC for Real-Time Image Processing
18.8.4 Using VLSI Circuits for Accurate Agriculture
18.9 Precision Agriculture using VLSI Circuits
18.10 VLSI Circuits for Greenhouse and Controlled Environment Agriculture
18.10.1 Climate Control and Automation Circuits
18.10.2 Smart Lighting and Energy-Efficient Greenhouse Monitoring
18.10.3 VLSI-Based Hydroponics and Aeroponics Systems
18.11 Conclusion
References
19. Fundamentals of Memristors: Principles, Characteristics, and Emerging Applications
Rajib Sutradhar, Himangshu Jyoti Gogoi, Kuldeep Gogoi, Bijoy Barman, P. Puspa Devi and Dipjyoti Das
19.1 Introduction
19.2 Materials for Memristors
19.2.1 Electrode Materials
19.2.2 Resistive Switching Materials
19.2.2.1 Binary Oxides
19.2.2.2 Perovskites
19.2.2.3 Organic Materials
19.2.2.4 2D Materials
19.3 Memristor Characterization
19.3.1 Endurance
19.3.2 Retention
19.3.3 Switching Time and Energy Consumption
19.3.4 Cell to Cell and Cycle to Cycle Variability
19.3.5 Scalability
19.3.6 Switching Mechanism
19.4 Multiscale Simulation of Resistive Switching: Bridging Materials, Devices, and Systems
19.4.1 Microscopic Models
19.4.2 kMC/FEM Models
19.4.3 Semi-Empirical/Compact Models
19.5 Future Scope and Challenges
19.6 Conclusion
References
20. ZnO Nanotube–Based Biosensors for the Detection of DNA
Bases: A Comparative Study on Cytosine and Thymine Sensing
Indranil Maity and Siddhartha Bhattacharya
20.1 Introduction
20.2 Computational Methodology
20.3 Results and Discussion
20.3.1 Adsorption Energy Analysis
20.3.2 HOMO-LUMO Analysis
20.3.3 Density of States (DOS) Analysis
20.3.4 Projected Density of States (PDOS) Analysis
20.3.5 Molecular Electrostatic Potential (MEP) Mapping
20.3.6 Infrared (IR) Spectra Analysis
20.3.7 Electron Localization Function (ELF) Analysis
20.3.8 Mulliken Charge Analysis
20.3.9 Calculations of Global Parameters
20.3.9.1 Chemical Potential (μ)
20.3.9.2 Electronic Conductivity (σ)
20.3.9.3 Recovery Time (τ)
20.3.9.4 Sensitivity (S)
20.4 Comparative Analysis on Type-1 and Type-2 Systems
20.5 Application of Artificial Intelligence (AI) and Machine Learning (ML) in Bio-Sensors
20.6 Conclusion
Acknowledgment
References
21. Impact of Artificial Intelligence and Machine Learning
on the Design of Systems and the Future
Neha Tyagi
21.1 Introduction
21.2 Defining Applications of Artificial Intelligence and Machine Learning
21.3 The Necessity of Artificial Intelligence (AI) and Machine Learning (ML) in Modern System Design
21.4 Objectives
21.4.1 Understanding the Evolution of System Design with the Advent of Artificial Intelligence (AI) and Machine Learning (ML)
21.4.2 Analyzing Key Domains
21.4.3 Exploring Future Trends and Challenges, Including Ethical Considerations and Regulatory Concerns
21.4.4 Highlighting Real-World Applications and Case Studies to Showcase the Practical Benefits of AI-Driven System Design
21.5 Historical Context and Evolution
21.5.1 The Evolution of AI and ML in System Design
21.5.2 Early Rule-Based Expert Systems
21.5.3 The Rise of Machine Learning and Data-Driven Systems
21.5.4 The Deep Learning Revolution
21.5.5 Transition to Dynamic, Learning-Based Architectures
21.5.6 The Future of Artificial Intelligence (AI) and Machine Learning (ML) in System Design
21.6 Traditional System Design Approaches
21.6.1 Key Challenges of Traditional System Design
21.6.1.1 Scalability Issues
21.6.1.2 Limited Adaptability
21.6.1.3 High Maintenance Costs
21.6.2 Use Cases and Limitations
21.7 The Transformation Brought by Artificial Intelligence (AI) and Machine Learning (ML)
21.7.1 Automated Decision Making
21.7.2 Predictive Analytics
21.7.3 Adaptive Systems
21.7.4 Enhanced Scalability and Efficiency
21.8 Case Study for AI-Driven System Evolution in E-Commerce
21.8.1 Personalized Recommendations
21.8.2 Automated Customer Service
21.8.3 Fraud Detection and Security
21.9 The Role of Data in Artificial Intelligence (AI) Driven
System Design
21.9.1 Data Quality
21.9.2 Data Diversity
21.9.3 Real-Time Data Processing
21.10 Challenges in AI-Driven System Design
21.10.1 Data Privacy Concerns
21.10.2 Algorithm Bias
21.10.3 Computational Resource Demands and Energy Concerns
21.10.4 Additional Challenges Lack of Explain Ability and Transparency
21.11 Future Outlook
21.12 Conclusion
Bibliography
22. Non-Volatile Memory Devices for Neuromorphic Computing
Debasis Das
22.1 Introduction
22.2 Understanding the Neuro-Synaptic Behavior
22.2.1 Neuronal Dynamics
22.2.2 Synaptic Behavior
22.2.2.1 Supervised Learning
22.2.2.2 Unsupervised Learning
22.3 Implementing Neuromorphic Hardware Using eNVM Devices
22.3.1 Phase-Change Memory Devices
22.3.1.1 Device Physics
22.3.2 PCM As Spiking Neurons
22.3.3 PCM as Synapse
22.4 Resistive Memory Device
22.4.1 Device Physics
22.4.2 RRAM as Spiking Neurons
22.4.3 RRAM as Synapse
22.5 Spintronics Devices
22.5.1 Various Spintronic Devices and Its Operation
22.5.2 Spitronic Devices as Neuron
22.5.3 Spintronic Devices as Synapse
22.6 Conclusion
References
23. Cross-Voter Detection Using Zynq 7000 SoC Kit
Arun Kumar Manoharan, Nagarjuna Telagam, Nehru Kandasamy, Menakadevi Nanjundan and Balwinder Raj
23.1 Introduction
23.2 Cross-Voting Detection Algorithms
23.3 FPGA-Based Cross-Voting Detection
23.4 Zynq 7000 FPGA Applications
23.5 Edge Computing in Elections
23.6 System Model
23.7 Algorithm
23.8 Working Mechanism
23.9 Working on the Zynq Board
23.10 Results and Discussions
23.11 Conclusion
Bibliography
Index
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